Energy Analysis and Evaluation of WK-Recursive On-chip Interconnect

With the increasing complexity of Multi-Core System-on-Chip (MCSoC) and its communications requirement, Network-on-Chip (NoC) has emerged as a solution of nonscalable shared bus schemes currently used in MCSoC implementation. Recently, a new NoC structure based on WKrecursive network was analyzed and compared to 2D Mesh structure based on several performance metrics such as packet losses, throughput, message delay, and network load. In this paper, we focus on the evaluation of energy consumption because of the importance of this feature in mobile systems that are typically battery-based systems and have to be energy efficient. A simple energy model is presented and simulation results are conducted to compare the Wk-recursive and 2D Mesh on-chip interconnects. The main objective is to provide the designer with initial insight on this network on-chip interconnect and the relationship between application traffics and energy consumption.